CS451/CS551/ECE441/ECE541 - Advanced Computer Architecture

Instructor: Bob Rinker
Office: Moscow - JEB 235, Coeur d'Alene - Innovation Den, 418 E Lakeside Ave
Email: rinker@cs.uidaho.edu
Phone: (208)885-7378 (direct line), (800)824-2889 (press 1) ext. 7378
Office Hours (Fall 2019): TBD

Catalog Description:
CS J451/J551 Advanced Computer Architecture (3 cr). Same as ECE J441/J541. Principles and alternatives in instruction set design; processor implementation techniques, pipelining, parallel processors, memory hierarchy, and input/output; measurement of performance and cost/performance trade-off. Additional work required for graduate credit. Prereq: CS 150, Stat 301 or Permission

Syllabus: Downloadable from here.


Grading:
Your grade will be calculated using the following percentages:
CS551/ECE541CS451/ECE441
Two mid-semester exams 40% 50%
Final exam (comprehensive) 20% 25%
Assignments 20% 25%
Term Project 20%
Total 100% 100%

The letter grade you receive from the course will be determined as follows:
90%-100%A
89.9%-80%B
79.9%-70%C
69.9%-60%D
Below 60%F
The instructor reserves the right to adjust these percentages lower if deemed necessary.
Announcements:
Welcome to the class! Any announcements will show up here as needed.
Assignments:
Assignments will show up here sometime after they are assigned.

Assignment 1 - here Due Sept 13
Assignment 2 - here Due Sept 25
Assignment 3 - here Due Oct 9
Assignment 4 - here Due Oct 28
Assignment 5 - here Due Nov 6
Assignment 6 - here Due Nov 18



A blank Tomasulo worksheet is available here ( pdf )

Graduate Project - A list of potential projects is available here ( ps or pdf ). This is not an exclusive list - if you have an idea for a project, please discuss it with me.
Once you have decided on a project (and discussed it with me), please turn in this form

Some useful items:

Moore's Law paper (reference from the Wikipedia page) (pdf)
The "Billion Transistors" Paper (here)
Papers on Simultaneous Multithreading here
Bob's slides on Performance measurements and Amndahl's Law (here)
MIPS Programming card (ps or pdf)
More detailed MIPS info (ps or pdf)
Slides on queueing theory (here)
Queue Formula Handouts (from Jain, 1991)
M/M/1 Queue
M/M/m Queue

Link to the textbook website (here )

Last updated Wednesday, August 28, 2019