http://www2.cs.uidaho.edu/~cs481-50/wiki/ 2008-08-29T18:52:32-07:00 http://www2.cs.uidaho.edu/~cs481-50/wiki/ http://www2.cs.uidaho.edu/~cs481-50/wiki/lib/images/favicon.ico text/html 2007-12-07T15:51:39-07:00 Ryan Lease http://www2.cs.uidaho.edu/~cs481-50/wiki/doku.php?id=cs481_-_team_50_-_aes&rev=1197071499&do=diff Project Software/Documentation Current Documentation [Design Specification V2.0] [Legal Review V2.0] [Operational Specification V3.1] [Test Specification V3.0] [Test Log V2.0] [Test Log V3.0] Release 1 Release 1 Documentation Package: text/html 2007-12-06T11:02:48-07:00 Andrew Hattrup http://www2.cs.uidaho.edu/~cs481-50/wiki/doku.php?id=cell_processor_info&rev=1196967768&do=diff History Summary of Chip development Architecture A link to a discussion on Single Instruction Multiple Data (SIMD) processors and instruction sets. The Cell fits into this category of processors. <http://en.wikipedia.org/wiki/Single_Instruction_Multiple_Data> text/html 2007-12-06T10:45:24-07:00 Frank Jones http://www2.cs.uidaho.edu/~cs481-50/wiki/doku.php?id=release_3_documentation&rev=1196966724&do=diff Multi Threaded Parallel AES ECB & CBC Algorithms Design Architecture Parallel ECB Design Architecture vs. Parallel CBC Architecture Command Line Interface [Command Line Interface] Benchmark Data File [Data file] text/html 2007-12-06T10:43:53-07:00 Frank Jones http://www2.cs.uidaho.edu/~cs481-50/wiki/doku.php?id=release_2_documentation&rev=1196966633&do=diff Release 1 + Multi Threaded Parallel AES Algorithm Design Architecture Initial Design Architecture vs. Implemented Architecture Command Line Interface [Command Line Interface] Benchmark Data File [Data file] text/html 2007-12-06T10:39:54-07:00 Frank Jones http://www2.cs.uidaho.edu/~cs481-50/wiki/doku.php?id=release_1_documentation&rev=1196966394&do=diff Single Threaded AES Implementation with Benchmarking Instrumentation Multi-File Bash Script Handler